(a) Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a capacitor having metal/insulator/metal (MIM) structure and a method for fabricating the capacitor.
(b) Description of the Related Art
An MIM capacitor for a semiconductor device is formed as a metal/insulator/metal structure. The metal and insulator structures are layered on one another, such that a required capacitance can be provided.
Metal wirings are formed on an inter metal dielectric of the capacitor, and the metal wirings are connected to electrodes through plugs formed in the inter metal dielectric. By this arrangement, electricity can be applied to the electrodes.
The layered structures include via holes defining the plugs, the via holes having depths different from one another.
That is, the via holes are formed at different depths because the electrodes are formed on different layers. Since the via holes are formed at different depths, the etch process is performed with respect to the deepest via hole, such that the surface of the electrodes (upper electrode) exposed through the previously completed via holes are damaged while etching the via hole for exposing the low part (lower electrode).
Such damage deteriorates characteristics of the semiconductor device, and reduces the reliability of the device. Accordingly, in order to reduce the damage to the electrodes the etching process is performed using different masks according to the depths of the respective via holes to be formed. However, the utilization of additional masks complicates the fabrication process and increase manufacturing costs.